Search sponsor
Search sponsor
A persistent theme at this year’s IEEE PVSC—and frankly every such conference—was that solar photovoltaic technology exists in a material world. The discovery of new materials, the concoction of better versions of existing materials, the manipulation and processing of materials, and the deployment and measurement of finished, manufactured materials in modular form in a power system all underscore PV’s essential materiality. One young company’s disruptive approach to getting more out of the industry’s über-material—crystalline silicon—garnered a fair amount of attention at the conference.
Making the sandy stuff cheaper, either through production cost or material usage reductions, remains a high priority. Several methods of thinning it down well below 100µm are in development (even if most companies can’t yet handle thicknesses much below 150µm), including the use of diamond saws, epitaxy, and high-energy implant cleaving techniques.
Whatever the method, there’s a few hitches: even if you can make quality silicon so thin it’s flippy-floppy flexible, you need a cell architecture that will work with the material and production tools than can handle the delicate substrates without incurring mind-numbing levels of breakage in a high-volume manufacturing setting.
Astrowatt, founded by a team of ex-Motorola/Freescale semiconductor vets based in Austin, TX, has come up with an ingenious kerfless exfoliation technique capable of producing 25µm-thick metal-backed silicon foil, on which high-efficiency heterojunction cells can then be made—and handled.
Director of technology Rajesh Rao drew a thick crowd to his poster presentation, gamely explaining and fielding questions about the company’s proprietary “semiconductor-on-metal” (SOM) and “litho-less local back contact” (LBC, a possible selective-emitter alternative) methodologies. The full conference paper presented even more previously unrevealed details of Astrowatt’s unique pathway to ultimate thinness.
First, the ultrathin silicon is born of a parent wafer, the foils formed over the mama wafer using an electrochemical deposition process. Hydrogen gets into the silicon via the plating bath, and then an annealing step causes a thermal expansion mismatch and creates internal stresses in the substrate between the metal and the silicon.
A mechanical wedge makes fractures along a subsurface plane of the substrate, and voila!, you get an ultrathin bendy sliver. In the lab, Rao said they’ve been able to exfoliate as many as six foils from a single 500µm-thick mama wafer, with a goal of pushing that number up to 10 or more in production mode. The reuse of the carrier substrate is one of the key cost-reduction talking points in Astrowatt’s business plan.
But the company’s innovation is not just about manipulating silicon wafer thickness: the crew has also devised a way to process high-efficiency cells on the skinny yet sturdy SOM stuff using standard production gear.
The cellmaking process starts by creating a diffused n+ c-Si junction on the starting wafer using a standard POCl3 furnace or spray diffusion process, followed by adding a dielectric passivation layer on top of a doped surface. After patterning the passivated film to open up contact holes, a thick metal film is electrochemically deposited over the substrate.
Then it’s back to the exfoliation process to peel off one of those 25µm foils, which then receives a one-two helping of an amorphous-silicon heterojunction PECVD and ITO sputter. The requisite silver grid lines are then screen printed and fired.
Rao noted that Astrowatt’s processes treat the foil and parent wafer gently. TEM imaging reveals good crystallinity in the foil, with no dislocations or defects. This apparently helps preserve the bulk minority carrier lifetime of the mama wafer. One added benefit: it appears that these ultrathin cells are much less sensitive to minority carrier lifetime degradation.
The company has reached cell conversion efficiencies up to 12.5% using an unoptimized process without texturing and passivation. The device also achieved open-circuit voltage of 590mV, current density of 30.26mA/cm2, and fill factor of 70%.
Rao said their models show the potential to reach as high as 23% efficiencies. They expect that by turning various knobs—texturing (Jsc), passivation (Voc), metallization and cell design (FF)—the important cell I-V curve performance results will improve as well.
Keep in mind that the results, though promising, have been achieved in a lab setting so far. For example, Astrowatt has only texturized test samples and has yet to perform that process on final cells made from the ultrathin wafers. The expectation is, that once the foil’s textured front surface is combined with metal back reflector, light will pass through the exfoliated wafer several times and likely help boost the current.
Rao said the company plans to develop fully optimized 25µm-thick cells by 2012 and move into manufacturing in 2013. Astrowatt believes it can achieve cell costs of 46 to 52 cents/Wp and eventually push them down to less than 30 cents/Wp, once ramped to proper production scale.
But is Astrowatt too far out in front of this ultrathin silicon thing? Will SOM and LBC end up in the alphabet soup of technological curiosities or become part of the mainstream next-gen c-Si toolkit? Some attendees at the conference told me that, regardless of its exfoliational elegance, they are not convinced that the carrier-wafer approach really solves the inherent thin-wafer handling issues, and that even if the method does minimize breakage, they wonder if the throughput can be goosed to run thousands of cells per hour.
The firm has brought two experienced semiconductor/PV managerial hands on board in recent months—Jeannine Sargent as executive chairman and Curt Vass as CEO—to accelerate the transition from intriguing lab project to the first stages of commercial-scale operation and beyond. Given the stakes and urgency, before too long it should become clear whether Astrowatt’s pathway to thin has a chance to win.
