Breakage issues in silicon solar wafers and cells


By V. A. Popovich, Ph.D. Researcher, Department of Materials Science and Engineering, Delft University of Technology; M. Janssen, Delft University of Technology; I.J. Bennett, Energy Research Centre of the Netherlands (ECN); I.M. Richardson, Delft University of Technology

Reduction of silicon wafer thickness without increasing the wafer’s strength can lead to a high fracture rate during subsequent handling and processing steps. The cracking of solar cells has become one of the major sources of solar module failure and rejection. Hence, it is important to evaluate the mechanical strength of silicon solar wafers and influencing factors. The purpose of this work is to understand the fracture behaviour of multicrystalline silicon wafers and to obtain information regarding the fracture of solar wafers and solar cells. The effects on silicon wafer strength of saw damage and of grain size, boundaries and triple junctions are investigated, while the effects of surface roughness and the damage layer removal process are also considered. Significant changes in fracture strength are found as a result of different silicon wafer crystallinity and surface roughness. Results indicate that fracture strength of a processed silicon wafer is mainly affected by the following factors: the saw-damage layer thickness, surface roughness, cracks/ defects at the edges and the number of grain boundaries – which all serve as possible crack initiation points. The effects of metallization paste type and firing conditions on the strength of solar cells are also considered, with findings indicating that the aluminium paste type and firing conditions influence the strength of solar cells.

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The 12th Edition was published in May 2011. Highlights from this edition include Conergy’s in-depth study of MES in PV facilities; University of Konstanz heralds the return of UMG-Si; RWTH Aachen University details the gettering options available for selective emitters; TU Delft presents an overview of breakage issues for silicon wafers and cells; and the University of Toledo outlines the benefits of RTSE in polarized light metroscopy.

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