It is widely acknowledged that, without government subsidies, solar power still cannot compete effectively with conventional sources of electrical energy. As the industry strives to make solar electricity affordable and as a viable alternative to fossil fuels, solar power technology companies are diligently moving towards reducing the manufacturing cost for solar modules. In the case of thin-film solar cells in particular, as a benchmark, the cost of for solar power must be reduced for it to be competitive or to attain grid parity. This paper presents a number of opinions from industry leaders on how best to decrease this vital cost.
The PV industry is expected to eventually reduce its manufacturing costs well below €1/Wp. Major technological changes lie ahead of us for manufacturing wafers, solar cells and modules if this cost target is to be met. In order to focus R&D efforts amongst the myriad options, and to speed up the learning curve, the PV industry (equipment vendors, material suppliers and PV manufacturers) may benefit from collaborative efforts guided by an ITRS-like roadmap. In this paper we present the IMEC roadmap, the target of which is to reduce drastically the amount of pure Si needed per Wp by combining efficiencies beyond 20% with aggressive reductions in wafer thicknesses.
In today’s market, crystalline silicon wafer technology dominates industrial solar cell production. Common devices feature opposing electrodes that are situated at the front and rear surface of the wafer and subsequent front-to-rear interconnection is used for module assembly. This paper reflects the functions which have to be fulfilled for the back-side contact of the solar cell as well as challenges and advances for the two basic classes: full-area and local rear contact formation. While full-area contacting has proven to be a reliable technology for industrial production, local contacting through dielectric layers has yet to be put through its paces in industrial implementation.
To date, the United States’ photovoltaic markets have largely been driven by net-metered residential and commercial customer projects, in large part due to federal, state, and utility incentives (see Fig. 1). The rapid growth of the commercial market in particular can almost entirely be attributed to the development of the well-known ‘solar-services’ business model, also known as the solar performance or the third-party solar model, which began in the early 2000s. In short, the commercial solar market surpassed the residential sector, and in 2008 represented only 10% of the number of installations but well over two-thirds of the annual grid-connected megawatts in the U.S. PV market [1]. This article will provide background information on the U.S. solar markets, and define what a utility solar business model is and the drivers of different model types.
The recent photovoltaic industry shakeout which started around Q3 2008 has faced the overcapacity, credit crunch, and economic crisis that significantly declined the average selling price by 50 - 65%, including the price of thin-film photovoltaic modules. The changing business environment has put significant pressure on all PV manufacturing technologies but more candidly on amorphous silicon thin-film single-junction module manufacturers to advance and scale up the device efficiency and aggressively drive cost reduction. This paper outlines the approach taken at Moser Baer Photovoltaic Technologies India Limited (PVTIL), including process optimization and device management strategies, to enhance the module efficiency (total area) of the single-junction amorphous silicon quarter size, 1.43m2, substrate as manufactured using Applied Materials’ SunFab line.
The main goal of the solar industry is to reach grid parity as soon as possible. This can be achieved by reducing the manufacturing costs, by increasing conversion efficiencies and/or by improving the lifetime of solar modules. Driving down the cost of modules is not straightforward. Commercially available PV modules are typically sold with 20-year warranties, and changing these materials for economic reasons requires extensive material testing and recertification of the new module design. In the following sections, we will focus on the cost drivers of module manufacturing processes and how that could evolve into new module designs.
The seventh edition of Photovoltaics International was published in February 2010. This edition features a wafering focus from REC Wafer and SINTEF on how to improve cell efficiencies. In addition, EPIA provides in-depth analysis of feed-in-tariff schemes in our Market Watch; and in Cell Processing Fraunhofer ISE overcomes challenges in back-side metallization.
In today’s PV modules, the solar cells are commonly encapsulated in EVA. During lamination EVA undergoes a crosslinking reaction. From a practical point of view, two major interests arise. For quality control purposes, one needs to know the degree of curing of the EVA encapsulant after lamination. The focus in process optimization is on understanding the kinetics of the crosslinking as a chemical reaction. If this is known (and proven), one can predict appropriate crosslinking conditions (i.e. lamination temperature and time) that have to be matched to reach a certain degree of crosslinking. This contribution mostly deals with this latter aspect. DSC as well as DMA data and model-free kinetics were used in this study to establish the kinetics of the EVA crosslinking process. It was found that both techniques adequately predict the degree of crosslinking for any temperature as a function of the curing time.
After staying relatively quiet for much of the past year, thin-film PV manufacturer Nanosolar came out with a full docket of announcements on 9/9/09: the completion of its major panel-assembly factory near Berlin; the start of serial rollto-roll production of its flexible copperindium-gallium-(di)selenide cells in the company’s San Jose facility; $4.1 billion in panel purchases from customers – including some of the world’s largest utility companies; NREL-verified cell efficiencies up to 16.4%; and new technical details of both its printed CIGS cell technology and utility-scale panels.
Despite the fall in silicon prices, wafer thickness continues to be reduced. The handling of thin wafers between 120 and 160µm is under research at the Fraunhofer IPA, where gripper-dependent and independent variables were determined as parameters for the handling process. Diverse grippers are tested on an automated test platform. Among these are grippers that are specifically designed for wafer handling, as well as others that are not but are used for wafer manipulation. The test platform includes several different test and handling equipments and utilizes critical parameters that might be required for achieving a high production rate via shortest cycle times to investigate the impact on thin wafers. The first results of the position accuracy measurement in relation to the physical movement parameters and other industrial key figures in ongoing handling research are presented within this paper.
